20 beste vacatures voor de functie van engineer (python) – planning & in leuven, vlg (nieuwe medewerkers gezocht)

Junior Digital Physical Design / PnR Engineer
ICsense —Leuven
- Master
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- Bachelor
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IMEC Inc. —Leuven
- Doctoraat
- Master
- Productie
Junior Mixed-Signal Verification Engineer
ICsense —Leuven
- CAD
- Master
- Python
Senior R&D Engineer (Topology Optimisation & CFD)
MegaCool Technologies —Rotselaar
- Voltijds
- Doctoraat
- Master
- C++
Snel solliciteren
Powertrain Simulation Engineer - Model Based Calibration
Applus IDIADA —Zaventem
- € 40.000 - € 55.000 per jaar
- Voltijds
- Engels
- Master
- Python
Snel solliciteren
Process Engineer Dicing
IMEC Inc. —Leuven
- Doctoraat
- Onderzoek
- Master
Senior Computer Vision Engineer
The Kobi Company —Leuven
- C++
- Linux
- Python
Senior Digital Design Engineer
ICsense —Leuven
- Engels
- Scripting
- Python
AI Engineer
Smals —Brussel
- Voltijds
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- Engels
- Master
CAD Engineer
IMEC Inc. —Leuven
- Hybride werken
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- Master
R&D Engineer for bevel management
IMEC Inc. —Leuven
- Doctoraat
- Onderzoek
- Master
6 dagen
Analytics Engineer
dataroots —Leuven
- Voltijds
- Hybride werken
- Engels
- SQL
- Bachelor
Snel solliciteren
CAD Support Engineer
ICsense —Leuven
- CAD
- Master
- Bachelor
Virtual Platform R&D Engineer
IMEC Inc. —Leuven
- Doctoraat
- Engels
- Master
Senior R&D Engineer (Generative Design & CFD)
Digital Pipl —Rotselaar
- Voltijds
- Doctoraat
- Master
- C++
Test Engineer
Entico —Leuven
- Voltijds
- Python
2 dagen
Ingénieur en conception électronique (H/F/X)
Quimesis —Waver
- Engels
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Modeling & Control Engineer
ART Robotics —Herent
- Voltijds
- C++
- Machine learning
- HVAC
Digital Designer — CPU Subsystem (RTL & Verification) (Temporary Assignment)
IMEC Inc. —Leuven
- Python

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Junior Digital Physical Design / PnR Engineer

ICsense
Leuven

Nu solliciteren

Vacaturegegevens

Kwalificaties

VHDL
Master
Verilog
C
Back-end development
Scripting
SystemVerilog
Python

Volledige vacaturetekst

The job location is Leuven.

The main role of the junior digital physical design / PnR Engineer is to perform and organize the digital and mixed-signal physical design of ASICs developed by ICsense.

Responsibilities

Physical design of digital integrated circuits (place & route) following the internal design rules and quality regulations. Assumes full responsibility on the quality and accurateness of the back-end layouts.

- In close cooperation with analog layouters, digital designers and project leaders
- Organization of deliverables and timings of these deliverables to ensure high-quality and timely delivery of the digital and mixed-signal top-level layout
- Top-level assembly of ASICs containing digital and analog parts, considering DFT
- Top-level physical verification: LVS, DRC, ERC, antenna, IR drop, electro migration…
- Setup and maintain technology setup and tool flow for place & route and physical synthesis

Competences

You have a master’s degree in electrical engineering (preferably chip design)
You are a dynamic and highly motivated engineer
You want to learn all about digital physical design, floor planning and P&R for multiple power-domains (UPF) and multiple clock-domains.
You love automating tools using e.g. a script-based approach (Python, TCL…) to streamline the back-end flow.
You are interested to learn about digital synthesis, logic equivalence checking, Static Timing Analysis and physical verification.
You have strong communication and reporting skills, also in English.
Considered as a plus:
- Experience with front-end RTL design in VHDL and/or Verilog and/or SystemVerilog
- Experience with scripting and programming languages such as Python, TCL and C
- Experience with back-end synthesis and timing analysis (STA)

Our offer

The job location is Leuven
An attractive salary package with a variety of extra benefits
A stimulating and pleasant working environment with regular team activities
A financially healthy company with growth potential
Possibility to continuously learn and grow through in-house and external trainings
Becoming a part of next generation innovative IC developments for international customers in micro-electronics, automotive, medical and industrial companies

Marijke

Think you’d be a great addition to our team? We’d love to hear from you – get in touch and let’s start the conversation.

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engineer (python) – planning & vacatures in leuven, vlg

Junior Digital Physical Design / PnR Engineer

Development Engineer

R&D Release Technology Process Engineer

Junior Mixed-Signal Verification Engineer

Senior R&D Engineer (Topology Optimisation & CFD)

Powertrain Simulation Engineer - Model Based Calibration

Process Engineer Dicing

Senior Computer Vision Engineer

Senior Digital Design Engineer

AI Engineer

CAD Engineer

R&D Engineer for bevel management

Analytics Engineer

CAD Support Engineer

Virtual Platform R&D Engineer

Senior R&D Engineer (Generative Design & CFD)

Test Engineer

Ingénieur en conception électronique (H/F/X)

Modeling & Control Engineer

Digital Designer — CPU Subsystem (RTL & Verification) (Temporary Assignment)

Ik wil de nieuwste vacature-alerts ontvangen voor de functie van engineer (python) – planning & in leuven, vlg

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